Tan Bui-Thanh, The University of Texas at Austin, United States
Tan Bui-Thanh
The University of Texas at Austin, United States
Tan Bui is a Professor and the Endowed William J. Murray, Jr. Fellow in Engineering No. 4 at The University of Texas at Austin (Oden Institute for Computational Engineering and Sciences and the Department of Aerospace Engineering and Engineering Mechanics). He is also the Director of the Center for Scientific Machine Learning. He earned his Ph.D. in Computational Fluid Dynamics from the Department of Aeronautics and Astronautics, Massachusetts Institute of Technology, in 2007, where he developed model-constrained model-reduction methods for large-scale aerodynamic systems. For over 26 years, his career has focused on computational science, engineering, and mathematics, advancing the mathematical, algorithmic, and computational foundations needed for reliable prediction, inversion, and uncertainty quantification in complex multiscale, multiphysics systems governed by partial differential equations. Professor Bui has held several leadership roles in the scientific computing community, including elected Vice President of the SIAM Texas–Louisiana Section and elected Secretary of the SIAM Activity Group on Computational Science and Engineering (SIAG/CSE). His honors include an NSF CAREER Award (jointly funded by the Office of Advanced Cyberinfrastructure and the Division of Mathematical Sciences), the Oden Institute Distinguished Research Award, two Moncrief Faculty Challenging Awards, and recognition as a Gordon Bell Prize finalist.
Abstract:
We develop a probabilistic framework for planning optimal contact points with a moving agent whose
trajectory is uncertain but approximately optimal. The target's motion is modeled as a stochastic process
consistent with a Hamilton–Jacobi principle of optimality, where uncertainty arises both from sensing noise
and from ambiguity in model parameters such as target location or turning radius. This uncertainty induces
a mixture model over possible trajectory distributions, leading to a stochastic optimization problem that seeks
a small set of space–time contact points maximizing the probability of successful interception.
Furthermore, we seek to intercept the agent's trajectory before it arrives at its target. We formulate this objective as a min–max optimization over parameter hypotheses and derive a structural
characterization of the optimal solution. In particular, we show that the support of the optimal sampling
distribution lies within the union of Pareto–optimal intercept configurations, each corresponding to a convex
combination of parameter-conditioned success probabilities. This result provides a principled foundation for
planning under uncertainty in applications such as autonomous rendezvous, probabilistic interception, and
multi-agent coordination, where near-optimal but uncertain motion models are available.
Cong-Kha Pham, The University of Electro-Communications, Japan
Cong-Kha Pham
The University of Electro-Communications, Japan
Cong-Kha Pham received B.S., M.S., and Ph.D. degrees in Electronics Engineering from Sophia University, Tokyo, Japan. He is currently a professor with the Department of Information and Network Engineering, University of Electro-Communications (UEC), Tokyo, Japan. His research interests include hardware system design and implementation by FPGAs and integrated circuits. Recent projects include research on energy harvest power supply and low-power data-centric sensor network systems utilizing them, the development of long-distance transmission and miniaturization equipment for sensor networks by low-power wireless, the super low-voltage device project, research on memory-based information detection systems, the hardware implementation of hardware systems by FPGAs and integrated circuits, etc. Professor Pham teaches many undergraduate and postgraduate students and has received numerous awards for dissertations. The University of Electro-Communications Integrated Circuit Design Laboratory (Pham Lab) educates on the design, implementation, and evaluation of hardware systems and VLSI, aims to design “system-on-chip” by integrating various information processing hardware, and develops a high-performance computational circuit realized with a small number of elements.
Abstract:
TBA